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Post-Polish Wafer Geometry
Wafer shape after polishing:
Providing a precision polished flat surface is indispensible for maximum die yield in integrated circuit lithography. ADE has provided the metrology for wafer flatness to as much as 90% of the wafer-polishing industry for more than two decades. Our metrology product lines cover every stage of integrated circuit development from 50mm to 300mm wafers, from 500nm CDs to critical dimension nodes as low as 45nm. Wafer manufacturers in every part of the globe know and use ADE dimensional measurement equipment to develop wafer fabrication and polishing processes and monitor factory automated production.
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Products for this application:
AFS™ FabVision™ - wafer metrology management
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